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Massively parallel wafer-level reliability system and process for massively parallel wafer-level reliability testing

Patent Number: 10,241,149

Abstract

The massively parallel reliability (MPR) system is a compact measurement setup to perform highly accurate reliability tests on semiconductor devices. The innovations associated with the MPR system center on the densification and miniaturization of the semiconductor electrical characterization concept in three different ways. First, the miniaturization of the concept of a probe station into a small volume station allows for the use of multiple stations in a finite space. This multiplication of probe stations allows for the independence of test conditions, reduces the tests' overall duration, and decreases the cost of testing. The second innovation is the use of an innovative probe card that can withstand high test temperatures and contains a large number of test terminals. Third, the instrumentation electronics design provides the environmental conditions for the reliability tests (up to 400 degrees C) and performs the measurements at high density and accuracy. The arrangement of these solutions makes the MPR system a groundbreaking tool in the area of semiconductor device reliability.

Patent Description

The massively parallel reliability (MPR) system is a measurement platform where thousands of semiconductor devices are tested for long term reliability.  The system is designed to perform some of the standard reliability tests for certain degradation mechanisms in semiconductor devices.  Conventionally, these tests require specific equipment dedicated for certain measurement conditions, which makes the reliability testing costly, space and time consuming, and often lacking the statistical accuracy needed for rigorous reliability predictions.  The MPR system provides a new compact solution for several aspects of semiconductor device reliability testing.  The system itself (Figure 1 below) is a rotating circular tray (lazy Suzan) that contains thirty testing stations, each with independent control.  The center of the system is a fixed platform where the center command computer is placed.  Attached to the fixed platform is a microscope that focuses on the loading position.  Thus, the operation is such that the silicon wafers are mounted onto the test station under the microscope in the loading position.  The silicon wafer is then put on electrical contact with the probe card placed on the top of its testing station.  The probe card is attached to electronic cards that control the experiment conditions and send the collected data to the central computer.  Once the given station is running, the user rotates the outer ring of the platform to put the next station under the loading position where a second set of conditions can be run.

Features

The test stations are fully independent in terms of probing and electronic control.  This represents a major difference from the conventional reliability test apparatus.

Created February 26, 2020, Updated April 15, 2020