The Commerce Department's National Institute of Standards and Technology, the Energy Department's Sandia National Laboratories and the private sector's SEMATECH have developed a new measurement tool to support the future manufacture of faster, more powerful microchips than can be built currently.
The proposed reference material, now being evaluated by a private-sector consortium of 13 semiconductor manufacturers and metrology tool companies, can be used by U.S. chipmakers to calibrate their own microchip measuring equipment for accurate assessments of features as tiny as 1/1,000th the width of a human hair.
"That dimension meets the semiconductor industry's requirements for the next several generations of integrated circuits," said Michael Cresswell of the Semiconductor Electronics Division in NIST's Electronics and Electrical Engineering Laboratory.
Made of a single-crystal silicon film, the proposed reference material's geometric regularity and perfection offer flat, smooth surfaces ideal for comparative measurement of the incredibly tiny "critical dimensions" (known as CDs) of transistors that make up microchip integrated circuits. It is anticipated that, unlike current technologies, measurements of the same feature using equipment calibrated by the proposed RM will remain consistent no matter what metrology method is used.
Current metrology reference materials, created by photo patterning and plasma etching polycrystalline films, are not perfectly uniform. Distortion or variability in measurements becomes severe when the feature being measured falls beneath 0.35 micrometer (about 1/300th the width of a human hair). Additional problems occur when measurements are made using different techniques.
NIST's Semiconductor Electronics Division established a Single-Crystal CD-Reference Materials Consortium in response to numerous requests to evaluate a prototype of the reference material. Sample test chips have been distributed to the 13 consortium members: Advanced Micro Devices Inc., Sunnyvale, Calif.; Benchmark Technologies Inc., Lynnfield, Mass.; Digital Semiconductor Inc., Hudson, Mass.; IVS Inc., Concord, Mass.; Keithley Instruments Inc., Cleveland, Ohio; KLA Instruments, San Jose, Calif.; Lucent Technologies Inc., Murray Hill, N.J.; Nanometrics Inc., Sunnyvale, Calif.; Opal Inc., Santa Clara, Calif.; Optical Specialties Inc., Freemont, Calif.; Photronics Inc., Brookfield, Conn.; Renishaw PLC, Wotton-under-Edge, United Kingdom; and VLSI Standards Inc., San Jose, Calif. Under the terms of a cooperative research and development agreement, each member will make a minimum of 20 measurements on segments of the chips. Comparative measurements will be made concurrently with conventional metrology methods: low-cost electrical techniques, optical transmission microscopy, scanning electron microscopy and atomic force microscopy.
Consortium members also promise to assess the commercial utility of the prototype reference samples and to suggest design and fabrication enhancements that eventually could lead to the development of a traceable-to-NIST Standard Reference Material.
Testing results will be reviewed by the consortium at a meeting during the July 14-18, 1997, SEMICON West 97 trade show and conference in San Francisco, Calif. A positive evaluation of the prototype reference material would support strongly its establishment by semiconductor manufacturers as an SRM standard for critical dimension metrology.
The reference material's development is part of NIST's National Semiconductor Metrology Program. The NSMP is designed to meet the highest priority measurement needs of the semiconductor industry as expressed by the industry-led National Technology Roadmap for Semiconductors.
An agency of the Commerce Department's Technology Administration, NIST promotes economic growth by working with industry to develop and apply technology, measurements and standards.
News and general information on the Semiconductor Electronics Division is available at http://www.eeel.nist.gov/semiconductor