Twenty-three semiconductor research projects are advancing efforts to provide key measurements labeled as critical by the industry for the production of next-generation microcircuits, according to Robert Scace, director of the National Semiconductor Metrology Program at the Commerce Department's National Institute of Standards and Technology.
"Measurement science or metrology is a key enabler for the semiconductor development and manufacturing goals described in the Semiconductor Industry Association's National Technology Roadmap for Semiconductors," Scace said. "NSMP programs provide the semiconductor industry with the high resolution, precise, and increasingly sensitive measurement tools that it continually needs to improve its ever more densely packed and shrinking computer chips. Our goal is to help the U.S. semiconductor industry keep its multibillion dollar competitive edge into the 21st century," he said.
In recent months, the NSMP has completed or, in one case initiated, the following metrology projects needed by the semiconductor industry:
Researchers have been successful at making quantitative images of semiconductor circuits with a resolution of approximately 20 to 30 nanometers (billionths of a meter), or about five ten-thousandths of the width of a human hair. The images are produced with a scanning capacitance microscope, developed by NIST in cooperation with Digital Instruments of Santa Barbara, Calif. Special interpretive software was created by NIST. The imaging and software combination allows researchers to view and understand data showing the distribution of dopant atoms on or just below the surface of silicon wafers.
These chemical elements, or dopants (such as boron or phosphorus), are introduced selectively into silicon and other semiconducting materials to change their electrical characteristics. The performance of microelectronic devices depends totally on the spatial distribution of these purposely introduced atoms. The improved scanning capacitance microscope, combined with the software that permits the extraction of dopant densities from the measured capacitance image, provides information needed for verifying the predictions of computer models used in circuit and process development. NIST researchers are now creating a database of experimental measurements and modeling predictions to ensure the reliability of these quantitative measurements.
NIST scientists have created a laboratory version of a new X-ray microcalorimeter, an analytical instrument developed for on-line materials analysis and problem diagnosis. The X-ray microcalorimeter, used with a scanning electron microscope, identifies chemical compositions at specific places on a chip. It can discriminate among light elements such as boron, nitrogen and oxygen that cannot be separated by conventional detectors. It also enables investigators to separate elements such as titanium and nitrogen, whose X-ray responses overlap in other instruments. The energy resolution is currently 10 times better than state-of-the-art silicon detectors and can be improved further. Initial tests demonstrate that this development may lead to a fully practical instrument having the potential to revolutionize X-ray surface analysis.
NIST has developed a software package called MONSEL2 that locates the position of line edges imaged in scanning electron microscopes (known as SEMs) to within six nanometers. This advance, necessary for fabricating future microchips, is equivalent to being able to measure accurately within 25 atoms or one ten-thousandth the width of a human hair.
NSMP has launched a joint effort with MIT Lincoln Labs to remedy current obstacles inhibiting the production of the next generation of optical lithography tools. The project involves greatly improving techniques for measuring index of refraction and light attenuation of lens materials, calibrating laser power meters, and mapping resolution and overlay characteristics. Meeting the requirements of the National Technology Roadmap for Semiconductors calls for these barriers to be overcome within two years.
NIST coordinated an International Organization for Standardization round-robin study among 16 secondary-ion mass spectrometry laboratories that demonstrated an interlaboratory accuracy within 8 percent when measuring boron in silicon by secondary-ion mass spectrometry (known as SIMS). NIST's Standard Reference Material 2137, Boron in Silicon, played a critical role as the common calibration standard used in these tests. This improvement enables significant improvement in process control for materials producers and integrated circuit manufacturers.
NIST is developing a second Standard Reference Material for arsenic implants based on a similar round robin among 12 SIMS laboratories. The SEMATECH Analytical Laboratory Managers Working Group has designated this Standard Reference Material as a priority item. NIST has obtained implanted silicon wafers and will certify the arsenic dose with an expected uncertainty of about 1 percent by neutron activation analysis.
Using suspended thin films of aluminum and copper, NIST has developed and demonstrated a method for measuring the mechanical properties of thin metal films. The cross-section of the specimens is similar to films found on integrated circuit chips. The technique and data will allow improvement in the mechanical reliability of advanced interconnect materials. For example, collaborations with Ford Microelectronics and Sandia National Laboratories have demonstrated that sputtered copper thin films are much stronger than electron beam evaporated films.
In collaboration with the Institute for Interconnecting and Packaging Electronic Circuits, NIST research contributed to a new revision of industry standard ANSI/J-STD-002, Solderability Tests for Component Leads, Terminations, Lugs, Terminals, and Wires. The standard puts solderability assessment on substantially stronger technical ground than ever before. Process engineers have been concerned with the production of reliable solder joints in electronic systems for over 50 years, with more folklore than fact to guide them until now. The revised standard includes new knowledge developed at NIST to help manage this problem.
The NSMP draws on the full range of NIST expertise in semiconductor metrology, which includes both segments of the industry: mainstream silicon technology and the significantly smaller but important segment that deals with compound semiconductors. Researchers working in electronics and electrical engineering, manufacturing engineering, chemical science and technology, materials science and engineering, and fundamental physical sciences are invited to staff these projects. Cooperating with its industry partners, the NSMP plans, prioritizes, funds and coordinates in-house metrology development projects associated with microcircuit materials, processes, lithography, interconnection, and packaging. Within NSMP, work focuses exclusively on mainstream silicon complementary metal-oxide-semiconductor (or CMOS) technology addressed by the National Technology Roadmap for Semiconductors.
In addition to the projects described above, NSMP work includes projects in nanometer-scale dimensional metrology (optical, SEM, electrical, and scanning probe line width and overlay measurements); high-accuracy two-dimensional measurements; wafer and chuck flatness; optical scattering from wafer surfaces; characterization of microroughness and near-surface defects; ultraviolet radiometry; plasma and chemical vapor deposition process measurements and models; flow, moisture content and pressure of gases and residual gas analysis; silicon materials property measurements; thin-film profile measurement methods and reference materials; electrical test structure metrology; improved high-temperature thermometry; and polymer cure and performance.
NIST has developed and delivered solutions to the semiconductor industry's measurement problems for over 40 years. This activity received a major boost in 1994 when, at the request of the semiconductor industry, the Department of Commerce established the National Semiconductor Metrology Program at NIST.
The Office of Microelectronics Programs, which acts as a focal point for semiconductor-related activities at NIST, manages the NSMP. For further information contact Robert I. Scace, Director, Office of Microelectronics Programs, A321 Technology Building, NIST, Gaithersburg, Md. 20899-0001, (301) 975-4400, fax: (301) 948-0978, e-mail: robert.scace [at] nist.gov.
A non-regulatory agency of the Commerce Department's Technology Administration, NIST promotes U.S. economic growth by working with industry to develop and apply technology, measurements and standards.