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Timestamp Temporal Logic (TTL) for Time Testing of Cyber-Physical Systems

Published

Author(s)

Mohammadreza Mehrabian, Mohammad Khayatian, Aviral Shrivastava, John Eidson, Patricia Derler, Hugo A. Andrade, Ya-Shian Li-Baboud, Edward Griffor, Marc A. Weiss, Kevin Stanton

Abstract

In order to test the performance and verify the correctness of Cyber-Physical Systems (CPS), the timing constraints on the system behavior must be met. Signal Temporal Logic (STL) can efficiently and succinctly capture the timing constraints on a given system model. However, many timing constraints on CPS are more naturally expressed in terms of events on signals. While it is possible to specify event-based timing constraints in STL, such statements can quickly become long and arcane in even simple systems. Timing constraints for CPS, which can be large and complex systems, are often associated with tolerances, the expression of which can make the timing constraints even more cumbersome using STL. This paper proposes an extension to existing temporal logic, Timestamp Temporal Logic (TTL), to more intuitively express the timing constraints of distributed CPS. TTL also allows for a more natural expression of timing tolerances. Additionally, this paper outlines a methodology to automatically generate logic code/programs to monitor timing constraints. Since our TTL monitoring logic evaluates the timing constraints using only the timestamps of the required events on the signal, TTL statements are designed to reduce the memory footprint compared to traditional STL monitoring logic, which stores the signal value at the required sampling frequency. The key contribution of this paper is a scalable approach for online monitoring of the timing constraints. We demonstrate the capabilities of TTL and our methodology for online monitoring of TTL constraints on two case studies: 1) Synchronization and phase control of two generators and, 2) Simultaneous image capturing using distributed cameras for 3D image reconstruction.
Citation
ACM Transactions on Embedded Computing Systems
Volume
16
Issue
5

Keywords

timestamp temporal logic, cyber-physical systems

Citation

Mehrabian, M. , Khayatian, M. , Shrivastava, A. , Eidson, J. , Derler, P. , Andrade, H. , Li-Baboud, Y. , Griffor, E. , Weiss, M. and Stanton, K. (2017), Timestamp Temporal Logic (TTL) for Time Testing of Cyber-Physical Systems, ACM Transactions on Embedded Computing Systems, [online], https://doi.org/10.1145/3126510 (Accessed May 24, 2024)

Issues

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Created September 26, 2017, Updated October 12, 2021