Synthesis, Fabrication, and Heterostructure of Charged, Substituted Polystyrene Multilayer Dielectrics and Their Effects in Pentacene Transistors

Published

May 10, 2016

Author(s)

Olivia J. Alley, Evan Plunkett, Tejaswini S. Kale, Xin Guo, Grace McClintock, Manasa Bhupathiraju, Brian Kirby, Daniel H. Reich, Howard E. Katz

Abstract

Charge trapping and storage in polymer dielectric can be harnessed for the control of semiconductor device behavior, including organic transistors. For example, gate insulators chosen for organic transistors have an important effect on both bias stress susceptibility and threshold voltage (V_th), and charging these layers can preset the operating voltages and control bias stress effects. In this paper, we describe a chemical design and film fabrication procedure that enables the construction of stacks of polystyrene (PS) layers, each with arbitrary concentrations of potentially chargeable functional groups. Thermal crosslinking of benzocyclobutene subunits ensures layer integrity while keeping the layers free of polar functionality and small molecule byproducts. Neutron reflectivity (NR), scanning electron microscopy, and atomic force microscopy (AFM) revealed the morphologies of single layers, bilayers, and trilayers of the PS-based polymers. Individual layer thicknesses varied systematically with polymer concentration in deposition solutions, as expected, and interfacial thicknesses ranged from 1.5-4 nm, independent of layer thickness, demonstrating formation of distinct layers with minimal roughness or intermixing. The PS-based materials were used as the sole gate dielectric for pentacene organic field-effect transistors (OFETs). We compared the OFET V_th values before and after charging. During charging, the gate electrode serves as one 'plate' of a parallel plate capacitor, and the pentacene film serves as the other. Maximum drain currents (I_d) observed from output and transfer curves were essentially identical, indicating minimal effects of bias stress on individual measurements. Increased bias stress stability as evidenced by reduced V_th shift was seen in devices with trilayers dielectrics with substituted PS as the middle layer compared to a dielectric made from unsubstituted PS. On the other hand, increased V_th shift was seen in many devices with bilayer dielectrics made with substituents. We attribute the decreased V_th shift seen in trilayers devices to an increased dielectric polarization of the substituted PS in the middle layer that countered the charge trapping effect in the top layer. This demonstration establishes a method for utilizing vertical charge patterns for various electronics applications.

Citation

Macromolecules

Volume

49

Issue

9

Pub Type

Journals

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Keywords

Neutron reflectivity, polymer electronics

Citation

Alley, O. , Plunkett, E. , Kale, T. , Guo, X. , McClintock, G. , Bhupathiraju, M. , Kirby, B. , Reich, D. and Katz, H. (2016), Synthesis, Fabrication, and Heterostructure of Charged, Substituted Polystyrene Multilayer Dielectrics and Their Effects in Pentacene Transistors, Macromolecules, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=920327 (Accessed May 10, 2024)