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Searching the Space of Tower Field Implementation of the F28 Inverter – with Applications to AES, Camellia,and SM4

Published

Author(s)

Zihao Wei, Siwei Sun, Lei Hu, Man Wei, Rene Peralta

Abstract

The tower field implementation of the GF_2^8} inverter is not only the key technique for compact implementations of the S-boxes of several internationally standardized block ciphers such as AES, Camellia, and SM4, but also the underlying structure many side-channel attack resistant AES implementations rely on. In this work, we conduct an exhaustive study of the tower field representations of the GF_2^8} inverter with normal bases by applying several state-of-the-art combinatorial logic minimization techniques. As a result, we achieve improved implementations of the AES, Camellia and SM4 S-boxes in terms of area footprint. Surprisingly, we are still able to improve the currently known most compact implementation of the AES S-box from CHES 2018 by 5.5 GE, beating the record again (excluding this work, the latest improvement was proposed at CHES 2018, which achieves 11.75 GE improvement over the optimal implementation at the time). For Camellia and SM4, the improvements are even more significant. The Verilog codes of our implementations of the AES, Camellia and SM4 S-boxes are openly available.
Citation
International Journal of Information and Computer Security
Volume
20
Issue
1-2

Keywords

tower field, inverter, S-box, AES, Camellia, SM4

Citation

Wei, Z. , Sun, S. , Hu, L. , Wei, M. and Peralta, R. (2023), Searching the Space of Tower Field Implementation of the F28 Inverter – with Applications to AES, Camellia,and SM4, International Journal of Information and Computer Security, [online], https://doi.org/10.1504/ijics.2023.127999 (Accessed May 27, 2024)

Issues

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Created October 31, 2023, Updated April 18, 2024