The realm of electronics product realization is marked by an extremely fast-paced market, stringent demands for product reliability and high importance to innovative design. Further, the time-to-market and the cost-to-realize play a critical role for product success. However, these attributes pose conflicting constraints on the realization process. While engineers need to converge quickly on a set of design alternatives, the high demand for reliability increases the breadth of behavioral simulations across the design space. Further, the multi-disciplinary nature poses integration challenges due to a disparate set of engineering tools, model representations, and simulation techniques. In this presentation, we shall focus on the following three technical areas to alleviate these hurdles in knowledge management during electronics product realization: (1) Design-Analysis Integration: In order to quickly converge on a set of feasible design alternatives while covering a wide range of behavioral simulations across the design space, it is essential for engineers to synthesize analysis and solution-specific product models for a given design alternative. This process is guided by ascertaining the context of analysis, identifying possible idealizations and mapping information from design specifications to the analysis specifications. Further, the modularity of this process is essential to explore all possible alternatives. We leverage from over a decade's worth of experience spanning methodologies and tools (www.eislab.gatech.edu/research/dai/
) and some recent advances in this area to demonstrate current and envisioned technologies for seamless design-analysis integration. (2) Standards-based Knowledge Representation: In order to create high-fidelity design, analysis and manufacturable product models, it is essential to use a detailed and standard ontology for electronics product data specification. In this light, we employ STEP AP 210 (www.ap210.org
) for electronic assembly packaging and design as the underlying representational structure for creating and archiving product models. Further, we use a harmonized set of STEP-based schemas for product model specifications across the design-analysis integration bridge. In this presentation, we shall focus on the ability of a standards-based knowledge representation scheme to support product and process related knowledge for electronics PLM. (3) Experimental Validation of Simulation Techniques: In general, a simulation-based methodology needs to be validated against experimental results to justify reuse and instill confidence in decisions based on simulation results. In this presentation, we shall also demonstrate on algorithmic techniques for validating simulation results with experimental data and discuss some critical issues concerning the same. Further, in this presentation, we will exemplify recent developments in the three technical areas using thermo-mechanical warpage analysis problem for printed circuit boards and assemblies, as part of the current collaborative effort between co-author organizations.