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A Local Oscillator for Chip-Scale Atomic Clocks at NIST

Published

Author(s)

Alan Brannon, J Breitbarth, Z Popovic, Vladislav Gerginov, V Shah, Svenja A. Knappe, Leo W. Hollberg, John E. Kitching

Abstract

We report the first local oscillator (LO) demonstrating viability in terms of performance, size, and power, for chip scale atomic clocks (CSAC) at the National Institute of Standards and Technology in Boulder, CO. This volgate-controlled oscillator (VCO) achieves the lowest combined size, DC power consumption, phase noise, and thermal frequency drift among those previously reported, while achieving a tuning range large enough to compensate for part tolerances but small enough to permit precision locking to an atomic resonance. We discuss the design of the LO and the integration with the NIST physics package.
Proceedings Title
IEEE International Frequency Control Symposium
Conference Dates
June 5-7, 2005
Conference Title
Proceedings of the IEEE International Frequency Control Symposium

Keywords

chip scale atomic clocks, CSAC, VCO, VCSEL, voltage controlled oscillator

Citation

Brannon, A. , Breitbarth, J. , Popovic, Z. , Gerginov, V. , Shah, V. , Knappe, S. , Hollberg, L. and Kitching, J. (2005), A Local Oscillator for Chip-Scale Atomic Clocks at NIST, IEEE International Frequency Control Symposium, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=841991 (Accessed July 13, 2024)

Issues

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Created June 1, 2005, Updated February 19, 2017