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Electrostatic Discharge Protection For Embedded-Sensor Systems-On-a-Chip

Published

Author(s)

Javier A. Salcedo, Juin J. Liou, Muhammad Afridi, Allen R. Hefner Jr., Ankush Varma

Abstract

The robustness of Embedded-Sensor (ES) System-on-a-Chip (SoC) applications involves several design constrains that require a unique assessment. For example, space-efficient electrostatic discharge protection (ESD) must be provided to protect the CMOS devices during the sensor micromachining processes in addition to the protection provided during normal operation and handling. In this paper, reliable and space-optimized on-chip ESD protection structures are demonstrated for MicroElectroMechanical Systems (MEMS)-based ES-SoCs. This ESD protection solution involves design of novel thyristor-type devices implemented in the standard double-well CMOS technology. By means of TLP measurements is presented how the thyristor-type devices are feasible for the protection at the I/O pad level without the danger of latch-up and also for the protection at the internal sensing film electrodes.
Proceedings Title
206 th Meeting of The Electrochemical Society (ECS)
Conference Dates
October 3-8, 2004
Conference Location
Honolulu, HI, USA
Conference Title
2004 Joint International Meeting 206 th Meeting of The Electrochemical Society (ECS) 2004 Fall Meeting of the Electrochemical Society of Japan (ECSJ)

Citation

Salcedo, J. , Liou, J. , Afridi, M. , Hefner Jr., A. and Varma, A. (2004), Electrostatic Discharge Protection For Embedded-Sensor Systems-On-a-Chip, 206 th Meeting of The Electrochemical Society (ECS), Honolulu, HI, USA, [online], https://tsapps.nist.gov/publication/get_pdf.cfm?pub_id=31718 (Accessed May 27, 2024)

Issues

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Created October 7, 2004, Updated October 12, 2021