Cresswell, M.
and Allen, R.
(2001),
Electrical CD Metrology and Related Reference Materials, Marcel Dekker, Inc.,
(Accessed June 2, 2024)
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Electrical CD Metrology and Related Reference Materials
Published
Author(s)
,
Abstract
In the fabrication of integrated circuits, the steps of depositing a thin film of conducting material, patterning it photo-lithographically, and then etching it and stripping the remaining resist, are repeated several times as required levels are created. In addition to the active circuits, test patterns that have a variety of drawn linewidths, are printed on the wafer. These linewidths are typically referred to as the process's critical dimensions (CDs). The CDs of features in the test pattern are measured to determine patterning steps have produced features that comply with engineering specifications. The presumption is that, if the CDs of the features in the test pattern are found to be replicated within predefined limits, then the CDs of the features replicated in the synthesis of the integrated circuit are replicated within those limits. The several common linewidth-metrology techniques in use today are Electrical CD (ECD) as discussed in this chapter, Scanning Electron Microscopy (SEM) CD, and Scanning Probe Microscopy (SPM) CD.Citation
Handbook of Silicon Semiconductors Metrology
Publisher Info
Marcel Dekker, Inc.,
Pub Type
Books
Keywords
critical dimension, electrical dimension, electrical critical dimension (ECD) line, reference material, sheet resistance, silicon-on-insulator
Citation
Issues
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Created June 1, 2001, Updated February 17, 2017