Determining the Location and Cause of Unintentional Quantum Dots in a Nanowire

Published

March 21, 2012

Author(s)

Ted C. Thorbeck, Neil M. Zimmerman

Abstract

Unintentional quantum dots are a common problem for single electron devices in both silicon and carbon. To determine the cause of these dots it is helpful to know their size and location. Because each dot is capacitively coupled to multiple gates, we can stereoscopically determine the location and size of the dots. Using a capacitance simulation we determined what sizes and locations are consistent with our measured capacitances, with a precision of several nanometers. Because we observe unintentional dots in the same location of the wire in multiple devices, we suggest the cause of the dots is a systematic but not deliberate consequence of the fabrication. This is in contrast to the typical assumption in the field that unintentional dots are caused by random atomic-scale defects such as interface traps. We also propose techniques to eliminate them from future devices

Citation

Nano Letters

Pub Type

Journals

Keywords

silicon single electron transistors, unintentional quantum dots, double quantum dot

Citation

Thorbeck, T. and Zimmerman, N. (2012), Determining the Location and Cause of Unintentional Quantum Dots in a Nanowire, Nano Letters (Accessed April 25, 2024)