Custom Hardware to Eliminate Bottlenecks in QKD Throughput Performance
The National Institute of Standards and Technology (NIST) high-speed quantum key distribution (QKD) system was designed to include custom hardware to support the generation and management of gigabit data streams. As our photonics improved our software sifting algorithm could not keep up with the amount of data generated. To eliminate this problem we implemented the sifting algorithm into our programmable chip (FPGA) hardware, gaining a factor of 50x improvement in the sifting capacity rate. As we increased the distance and speed of our QKD systems, we discovered a number of other performance bottlenecks in our custom hardware. We discuss those bottlenecks along with a new custom hardware design that will alleviate them, resulting in an order of magnitude increase in capacity of secret key generation rate.