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A Capacitance-Voltage Model for Polysilicon-Gated MOS Devices Including Substrate Quantization Effects Based on Modification of the Total Semiconductor Charge

Published

Author(s)

Eric M. Vogel, Curt A. Richter, Brian G. Rennex

Abstract

We present a model for simulating the capacitance-voltage characteristics of polysilicon-gated MOS devices with thin oxides. The model includes substrate quantization effects through a modification of the total semiconductor charge. Therefore, solutions for capacitance-voltage can be quickly obtained without the computational burden of solving over a physical grid. The model includes polysilicon depletion by self-consistently solving the Poisson equation. We conclude with comparisons of the capacitance-voltage characteristics obtained with this model and those obtained by self-consistent solutions to the Schroedinger and Poisson equations. Good agreement was observed over a wide range of oxide thickness and substrate doping.
Citation
Solid-State Electronics
Volume
47

Keywords

MOS structure, quantum mechanical effects, MOS model, capacitance-voltage, poly-depletion, thin oxides

Citation

Vogel, E. , Richter, C. and Rennex, B. (2003), A Capacitance-Voltage Model for Polysilicon-Gated MOS Devices Including Substrate Quantization Effects Based on Modification of the Total Semiconductor Charge, Solid-State Electronics (Accessed April 18, 2024)
Created March 9, 2003, Updated October 12, 2021