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NIST Increases the Speed of Superconducting Circuits by Advancing Josephson Junction Barrier Technology

On May 1, 2023, NIST researchers published a paper titled: “Nb/a-Si/Nb Josephson junctions for high-density superconducting circuits” by David Olaya, John Biesecker, Manuel Castellanos-Beltran, Adam Sirois, Peter Hopkins, Paul Dresselhaus, and Sam Benz. The results presented in this paper are a significant step toward increasing the speed and density of superconductor circuits beyond the state-of-the-art.

Josephson junctions are key elements in superconducting circuits for quantum-based voltage and radio-frequency signal synthesis in communications metrology, for high-speed, energy-efficient circuits in advanced digital computing, and for qubits in quantum computing. Faster and smaller junctions will enable higher performance, primarily speed and scalability, for these applications.

NIST advances Josephson junction barrier technology for increasing the speed and density of superconducting circuits
Highly magnified cross-sectional image taken with a scanning electron microscope of a superconductor circuit fabricated on silicon at NIST. Two faint horizontal lines highlighted on the left are two Josephson junctions stacked on top of each other; the faint lines are very thin (~ 5 nm) amorphous silicon barriers that are sandwiched between niobium layers. On the right is a resistor (R) made of a palladium-gold alloy that provides the proper damping of the junctions to achieve the desired circuit performance.

Superconductive electronics are based on Josephson junctions (JJs), the superconducting elements analogous to transistors in semiconductor electronics. JJs can operate at clock frequencies in the 100s of gigahertz while dissipating very little power, offering potential advantages over traditional digital computing paradigms. However, the large size of the JJs is a limitation to scaling to higher circuit densities, which are presently less than 1/1000th the density of semiconductor circuits. This work improves the switching speed and shrinks the size of the Josephson junctions to diameters less than 100 nanometers, allowing more junctions to be packed into the same chip size. 

The team demonstrated that high-quality niobium Josephson junctions with amorphous-silicon barriers can be fabricated with critical current densities much higher than can be achieved with aluminum oxide barriers, allowing the NIST team’s junctions to be made smaller and faster than is possible with that more common technology.  In addition, the team showed that annealing of the deposited films at a temperature of 300 °C for 1 hour can increase the critical currents of the junctions by more than 15 times the pre-annealed value without degrading the quality of the films or the junctions; this 300 °C anneal also increases the junction’s robustness to subsequent processing at temperatures below that, an advantage in junction manufacturability.  


Released May 1, 2023, Updated May 26, 2023