The only constant in HPC (High Performance Computing) seems to be the constant change in hardware. In recent years the increasing demand for compute power and energy efficiency has favored heterogeneous computing in which accelerator cards are added to compute nodes. GPUs have become popular in a number of communities and Intel introduced their first accelerator (Knights Corner, KNC) in 2013. However, with Intel’s second generation (Knights Landing, KNL) of the Many Integrated Cores (MIC) architecture (introduced in late 2016) we see a comeback of homogeneous computing. In my talk I will present the KNL architecture and will discuss its numerous advantages over the first generation of MICs. Early experiences with the KNL’s have been very positive and many in the community see a path forward for large-scale homogenous clusters. I will share general impressions and personal experiences with the new architecture, and will attempt to outline the changes in application codes necessary to take advantage of current and upcoming homogeneous hardware.
Gaithersburg, Bldg. 221, Room B145: 1:00 p.m. - 2:00 p.m.
VTC to Boulder Room 81-1A116
Texas Advanced Computer Center
Lars Koesterke joined TACC in the fall of 2007. He is a member of the High Performance Computing (HPC) group, with emphasis on Performance, Evaluation and Optimization (PEO) of parallel programs. Before coming to TACC, he held positions at the Astronomy Department at The University of Texas at Austin, NASA's Goddard Space Flight Center and the Universities of Potsdam and Kiel (both Germany). His work focuses on serial and parallel optimization, parallel computing with OpenMP and MPI, and Fortran. In 2011 he started evaluating and using Intel's first generation of the Xeon Phi architecture and he is now working on the current generation named Knights Landing (KNL).
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