Can photonics and microfluidic cooling save many-core parallel programming from its programming woes?

The increasing energy costs for on-chip and off-chip "data movement" for CMOS technology have led computing systems vendors to limit bandwidth among processors/memories: 1. adversely affecting productivity of performance programmers even when strong performance is still possible, and 2. limiting performance when not.

I will present R&D needs for overcoming this problem and invite help from NIST experts. This will include preview of enabling technologies that if properly developed and implemented could allow much more permissive communication for the prevailing designs of current computer architectures (e.g., manycores). I will present envisioned roles for silicon-compatible photonics and 3D VLSI as part of an original roadmap/agenda that also reserves an interesting midwifing role for microfluidic cooling. I will finally note relevance to communication systems, beyond computing.

For further information please contact Vladimir Aksyuk, 301-975-2867, vladimir.aksyuk [at] nist.gov (vladimir[dot]aksyuk[at]nist[dot]gov)