Compound semiconductor companies have been performing wafer thinning as a means of heat dissipation for over 20 years. GaAs wafer sizes, which started as wafer pieces, are now 150 mm in size and are run at relatively high volume in the world's leading fabs. As volume increases, the size of the substrate will also need to increase further to reduce cost. Moreover, III-V semiconductor substrates are becoming a larger part of the product mix for making chips. As this trend continues, the ability to support these more fragile substrates or thinned substrates with high topography throughout all backside processes, from initial thinning through debonding, has become more important.
To make this capability possible, new materials and equipment must be designed which enable the device to be subjected to less stress throughout the process. In this presentation, Brewer Science team will share technical information on our temporary bonding materials, processes and bench-top equipment for bonding and debonding.
For further information please contact Jessie Zhang, 301-975-4565, chen.zhang [at] nist.gov (chen[dot]zhang[at]nist[dot]gov)