The interest in using graphene as an electronic material arises in large part from the high speed with which electrons move through the material — approximately 100 times faster than in the silicon used in almost all modern electronic devices. Graphene is a single atomic layer of carbon with the thickness of a single carbon atom, making it ideal for small electronic devices like transistors or sensors. Graphene can be patterned using standard semiconductor lithography techniques, and can serve as both the active element of the electrical component and also as the “wires” or connections to other parts of the electrical circuit. However, the properties of graphene that make it so attractive are altered when graphene contacts other materials in an electrical device. The environment that graphene is placed in can lead to ripples in the graphene’s structure and electrical properties, affecting how well the charge carriers can go through the graphene circuit. Ultimately, these effectsdetermine how well the electrical device performs. The goal of this project is to develop atomic scale measurements using the CNST’s custom built scanning probe microscopes to determine how graphene’s electronic properties are altered when graphene is in contact with other materials in an electrical device. These measurements will help enable the optimization of graphene electronic devices and the future commercialization of graphene-based electronic technologies.
Two of the remarkable features of graphene that are opening avenues to multiple applications are its high transport carrier mobility and the broad tunability of its electronic properties. Graphene charge carriers can be tuned continuously from negative carriers (i.e., electrons), to positive (holes). Separating the point between the negative and positive carriers is a neutrality point where the charges go to zero. This condition is called the Dirac point , named after the Dirac theory used to describe graphene charge carriers. When graphene contacts other materials, like the substrates used in electronic devices, experimental measurements indicate that the carriers have difficulty going through the graphene. Contact with the other materials causes variation in carrier density, even from positive to negative charges from one location to another, leading to so-called electron or hole puddles. These puddles may be due to ripples in the graphene when is lies on the substrate, or perhaps charged impurities in the substrate material. Microscopic measurements are needed to get a view of the underlying effects of other materials in contact with graphene and how these effects change electrical transport through the graphene.
To perform measurements on graphene devices, NIST researches have to fabricate a representative electrical device. A typical semiconductor device is a complex "sandwich" of alternating conducting, semiconducting, and insulating layers and structures. To perform experiments on graphene devices, the NIST team fabricated structures with a single atomic sheet of graphene and another conductor separated by an insulating layer. When the bottom conductor is charged, it induces an equal and opposite charge in the graphene layer, and in this way the carriers can be switched from electrons (negative charges) to holes (positive charges). To determine how the graphene carriers are affected by the substrate insulators, NIST researchers used custom designed scanning probe microscopes . A unique feature of the NIST microscopes is the ability to optically align the SPM probe tip to the very small active graphene area on the device, which may be as small as tens of micrometers in length [Fig. 1(a)]. Once aligned, the microscope is cooled to liquid He temperatures (4 K) and tunneling microscopy and spectroscopy measurements are performed to probe the graphene carriers on the atomic scale.
The NIST team has developed a novel, microscopic SPM-based measurement technique, called gate mapping tunneling spectroscopy [Fig. 1(b)] to observe the nanoscale spatial variations in carrier density. In this method the tunneling conductance is measured as a function of energy at constant gate potential, and then the spectra is repeated with a small incremental change in gate potential. The resulting data is displayed in a map, showing a rich variety of detail that cannot be gathered by a single tunneling spectrum.
Using these methods the NIST team determined that the silicon oxide substrate potential fluctuations are interrupting the orbits of the electrons in the graphene, creating wells where the electrons and holes pool and reducing their mobility. The resulting p-n junctions (neighboring electron and hole regions) only localize the graphene carriers weakly due to the ability of graphene carriers to penetrate potential barriers. However, the NIST team found a dramatic change when a magnetic field was applied. The electrons lacked the energy to scale the barriers of resistance created by energy gaps between the Landau levels and settle into isolated pockets of graphene quantum dots, nanometer-scale regions that confine electrical charges in all directions. The Coulomb charging of the quantum dots was observed by as a diamond structure in the gate maps when the Landau levels cross the Fermi energy [Fig. 1(c)].
Fig. 2 NIST microscopic measurements show that interactions of the graphene layers with the insulating substrate material causes electrons (red) and holes (blue) to collect in "puddles". The differing charge densities between the top and bottom layers creates the random pattern of alternating dipoles (electric field arrows) and energy band gaps that vary on a nanometer scale.
Lead Organizational Unit:cnst
Cory R. Dean
Kenneth L. Shepard
Korea Institute for Advanced Study
National Institute of Standards and Technology
Angela Hight Walker
Seoul National University
University at Albany-SUNY
Ji Ung Lee
University of Texas-Austin