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Topic Area: Semiconductors

Displaying records 71 to 80 of 152 records.
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71. Channel Hot-Carrier Effect of 4H-SiC MOSFET
Topic: Semiconductors
Published: 3/2/2009
Authors: Liangchun Yu, Kin P Cheung, John S Suehle, Jason P Campbell, Kuang Sheng, Aivars Lelis, Sei-Hyung Ryu
Abstract: SiC MOSFET, as power device, can be expected to operate with high drain and high gate voltages, possibly leading to hot-carrier effect. However, hot-carrier degradation in a SiC MOSFET is difficult to detect because the as fabricated devices contain ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=900181

72. Controlled Formation and Resistivity Scaling of Nickel Silicide Nanolines
Topic: Semiconductors
Published: 2/25/2009
Authors: Bin Li, Zhiquan Luo, Paul S. Ho, Li Shi, Lew Rabenberg, JiPing Zhou, Richard A Allen, Michael W Cresswell
Abstract: We demonstrate a top-down method to fabricate nickel mono-silicide (NiSi) nanolines with smooth side walls and linewidths down to 15 nm. Four probe electrical measurements revealed that the electrical resistivity at room temperature remained constant ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=32991

73. Local Structure of Cu in Cs8Na16Cu5Ge131 Type II Clathrate
Topic: Semiconductors
Published: 1/8/2009
Authors: Winnie K Wong-Ng, Azzam Mansour, Matthew Beekman, George S. Nolas
Abstract: We have used X-ray absorption spectroscopy (XAS) to investigate the local structure of Cu and Ge in the Cs8Na16Cu5Ge131 type II clathrate. We show that the local structure parameters, coordination number, and distances for Ge are consistent with thos ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=854090

74. An Electrically-Detected Magnetic Resonance Study of the Atomic-Scale Effects of Fluorine on the Negative Bias Temperature Instability
Topic: Semiconductors
Published: 1/5/2009
Authors: J.T. Ryan, P. M. Lenahan, A.T. Krishnan, S. Krishnan, Jason P Campbell
Abstract: It has been shown that the negative bias temperature instability (NBTI) may be significantly suppressed through the incorporation of fluorine in the gate oxide. In this study, we use the electrically-detected magnetic resonance technique of spin depe ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=900189

75. A Standard Method for Measuring Wafer Bond Strength for MEMS Applications
Topic: Semiconductors
Published: 12/23/2008
Authors: Richard A Allen, Janet M Cassard, Winthrop A. Baylies, David Thomas Read, George David Quinn, Frank W DelRio, Kevin T. Turner, Michael Bernasch, Joerg Bagdahn
Abstract: A round robin, to provide precision and bias data for SEMI standard MS5-1107, Test Method for Wafer Bond Strength Measurements Using Micro-Chevron Test Structures, in underway. The precision and bias data, combined with experience in applying the tes ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=33132

76. Comparison of Nanoscale Measurements of Strain and Stress using Electron Back Scattered Diffraction and Confocal Raman Microscopy
Topic: Semiconductors
Published: 12/12/2008
Authors: Mark D Vaudin, Yvonne Beatrice Gerbig, Stephan J Stranick, Robert Francis Cook
Abstract: Strains in Si as small as 104 (corresponding to stresses of 10 MPa) have been measured using electron back scatter diffraction (EBSD), with spatial resolution close to 10 nm, and confocal Raman microscopy (CRM) with spatial resolution app ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=854129

77. Silicon Nanowire NVM Cell Using High-k Dielectric Charge Storage Layer
Topic: Semiconductors
Published: 12/5/2008
Authors: Xiaoxiao Zhu, Yang Yang, Qiliang Li, D. E Ioannou, John S Suehle, Curt A Richter
Abstract: Si nanowire (SiNW) channel non-volatile memory (NVM) cells were fabricated by a 'self-alignment' process. First, a layer of thermal SiO2 was grown on a silicon wafer by dry oxidation, and the SiNWs were then grown by chemical vapor deposition in pre- ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=33041

78. Extraction of Sheet Resistance and Line Width from All-Copper ECD Test Structures Fabricated from Silicon Preforms
Topic: Semiconductors
Published: 11/3/2008
Authors: Byron J Shulver, Andrew S Bunting, Alan Gundlach, Les I Haworth, Alan W Ross, Stewart Smith, Anthony J Snell, J. Tom Stevenson, Anthony Walton, Richard A Allen, Michael W Cresswell
Abstract: Test structures have been fabricated to allow Electrical Critical Dimensions (ECD) to be extracted from copper features with dimensions comparable to those replicated in IC interconnect systems. The implementation of these structures is such that no ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=32758

79. Monitoring I/Q data and pulse carving misalignments in RZ-DQPSK transmitters using a neural network approach
Topic: Semiconductors
Published: 11/1/2008
Authors: Jeffrey A Jargon, Xiaoxia Wu, Louis Christen, Alan Willner, Loukas Paraschis
Abstract: We propose a technique using artificial neural networks (ANNs) to simultaneously identify I/Q data misalignment and data/carver misalignment in both parallel-type and serial-type RZ-DQPSK transmitters. A correlation coefficient of 0.99 is obtained by ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=33152

80. Organic single crystal field-effect transistors of a soluble anthradithiophene
Topic: Semiconductors
Published: 10/22/2008
Authors: Oana Jurchescu, Sankar Subramanian, R J Kline, Steven D Hudson, John E Anthony, Thomas Jackson, David J Gundlach
Abstract: We use single crystals (grown by physical vapor transport) of a soluble oligomer to obtain a better understanding of the intrinsic properties, limitations and potential of these materials. Single crystals are well-suited for studies exploring the eff ...
http://www.nist.gov/manuscript-publication-search.cfm?pub_id=32830



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