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Back-End-of-Line Reliability Metrology

Summary:

This project aims to develop the metrology to enable quantitative assessment of performance limiting reliability issues in emerging electronic devices related to new materials, processes, and integration schemes. The scope of the project includes, but not limited to, the back-end-of-line (BEOL) structures, comprising the entire interconnect wiring system and their insulating dielectric layers, down to the packaging of the electronic devices. The metrology tools and techniques that we are developing include broadband RF-spectroscopy, X-ray micro-diffraction, electrical scanning probe microscopes (eSPMs), and thermo-mechanical stress aging, and temperature-bias accelerated aging stress testing. The developed metrology will aid advanced manufacturing, heterogeneous integration, security and commercialization of advanced complex integrated systems.

Technical Goals:

  • The strategic goal of this project is to advance complex integrated systems by creating leading edge metrology solutions that enable the mass commercialization of reliable heterogeneous electronic systems.
  • The tactical goals of this project include delivery of metrology solutions for ITRS (International Technology Roadmap for Semiconductors) identified difficult challenges, reference materials, models and documentary standards to enable mass manufacture of reliable advanced integrated systems.
  • To support the NIST / PML priorities on advanced manufacturing and cybersecurity

Description:

The Back-End-of-Line Reliability Metrology project supports measurements for advanced manufacturing and cybersecurity in the areas of secure nano-manufacturing, novel devices and electronic materials. Specifically, the project aims to develop the metrology required to enable a quantitative assessment and physical understanding of performance limiting reliability issues in emerging electronic devices related to new materials, processes, and integration schemes. Examples include metrology and documentary standards to enable mass manufacturing of three dimensional integrated circuits (3-D ICs).

The ultimate aim of this project is to develop the metrology to enable physics of failure (PoF) approaches to reliability assessments in support of designed-in reliability in nano-manufacturing of advanced electronics. Our work uses direct experimental measurements and inferred root causes of failure to inform modeling and simulation analyses, in order to address various reliability and failure mechanisms in electronic devices.

This project leverages our competencies in electrical scanning probe microscopy (eSPM), electromagnetics (broadband RF-measurements), X-ray micro-diffraction, thermo-mechanical properties and semiconductor process integration knowledge to achieve its goals. Some of the ongoing studies include:

  • Non-destructive electrical scanning probe microscopy (eSPM) based metrology for subsurface detection of defects and metal interconnects in the nanoscale regime.
  • Probe-assisted deterministic doping (PADD) for localized modification of material properties in nanoscale devices. This allows for unique identification signatures of products for cyber security applications.
  • Use of synchrotron-based X-ray micro-beam sources for depth-dependent measurement of the full stress tensors in interconnects used for 3-D integrated circuits (3-D ICs).
  • Adaptation of radio frequency (RF) based methods for reliability assessment of advanced interconnects, such as copper TSVs.
  • Simulation and modeling of electromagnetic and RF measurements using finite element methods.

Major Accomplishments:

2015

  • Leading semiconductor industry consortia initiated projects aimed at adapting our measurement techniques for reliability analysis of through-silicon via (TSV) interconnects for packaged devices.
  • Demonstrated a new way of detecting and characterizing electrically active defects (e.g., dangling bonds in dielectrics in integrated devices), using low frequency (≤ 300 MHz) RF scattering.
  • Demonstrated subsurface imaging of biased structures with scanning Kelvin force microscopy (SKFM) and non-biased metal interconnects with electrostatic force microscopy (EFM)

2014

  • Identified strain hardening and damage accumulation as the two primary mechanisms for stress evolution in copper through-silicon via (TSV) interconnects used in 3-D integrated circuits (3-D IC).
  • Publication (C. Okoro et al., Journal of Applied Physics, Vol. 114, 2014) was recognized as one of the most outstanding studies performed at Advanced Photon Source (APS) user-facility in 2014
  • Demonstrated sub-surface imaging of back-end-of-line (BEOL) structures with scanning microwave microscopy (SMM)
  • Designed and fabricated prototype electromagnetic field gradient reference structures.
  • Demonstrated Probe Assisted Deterministic Doping (PADD) for subsurface modification

2013

  • Reported the first non-destructive, depth-dependent measurement of the full strain/stress tensors in copper through-silicon via (TSV) using synchrotron-based X-ray microdiffraction technique
  • Successfully demonstrated the adaptation of radio-frequency (RF) based method for non-destructive identification, classification and characterization of performance-limiting defects in 3D integrated circuit interconnects.
Schematic diagram of a 3D stacked integrated circuit (3D-SIC), achieved using copper through-silicon via interconnects.
Figure 1. Schematic diagram of a 3D stacked integrated circuit (3D-SIC), achieved using copper through-silicon via (TSV) interconnects.

Lead Organizational Unit:

pml

Customers/Contributors/Collaborators:

  • ARL, Sematech, ITRS, HDPUG, SEMI, iNEMI, IMEC, LETI, LNE, Neocera, etc.

Facilities/Tools Used:

  • Cycling Chambers (RTP HAST, Inert Atmosphere Chamber)
  • Microwave/ RF Network Analyzers (Agilent VNAs, LeCroy SPARQ)
  • Scanning Probe Microscopes:
    • Atomic Force Microscopy
    • Scanning Microwave Microscopy (SMM)
    • Scanning Capacitance Microscopy (SCM)
    • Scanning Spreading Resistance Microscopy (SSRM)
    • Tunneling Atomic Force Microscopy (TUNA)
    • Electrostatic Force Microscopy
    • Magnetic Force Microscopy
    • amplitude-modulated dula pass Scanning Kelvin Force Microscopy (am-SKFM)
  • NIST Nanofab
  • Advanced Photon Source (APS) user-facility

Non-destructive EFM subsurface image on metal lines buried in 800nm thick glass, full scale: 35 degree. The white bar is 10 µm.

Figure 2. Non-destructive EFM subsurface image on metal lines buried in 800nm thick glass, full scale: 35 degree. The white bar is 10 µm.

AFM topography image

Figure 3. (a) AFM topography image (b) Tunneling-AFM (TUNA) current response at "Aluminum" doped Silicon (100) surface using probe-assisted deterministic doping (PADD)

Staff:

Yaw Obeng, Project Leader
Joseph Kopanski

Associates:

Chukwudi Okoro
Jungjoon Ahn
Lin You

Contact

Yaw Obeng
301-975-8093

100 Bureau Drive, M/S 8120
Gaithersburg, MD 20899-8120