CHIPS R&D Digital Twin Data Interoperability Standards Workshop

The CHIPS Research and Development Office’s Digital Twin Data Interoperability Standards Workshop will be held as a hybrid virtual and in-person event at the NIST National Cybersecurity Center of Excellence (NCCoE) conference facility in Rockville, MD from 8:30 a.m. to 5:30 p.m. Eastern Time on April 4, 2024, and 8:30 am to 12:30 pm on April 5, 2024. This one and one-half day hybrid event provides an opportunity to network and exchange ideas with thought leaders across the sector. This event will bring together technical experts from industry, academia, standards setting organizations, and industry alliances to identify community priorities for specific standards efforts. The workshop aims to foster collaboration, coordination, and innovation within the semiconductor industry's standards community. 

Digital twins in manufacturing enable proactive decision-making, predictive maintenance, scenario testing, and collaboration among stakeholders, etc. This workshop will focus on standards needs for a specific use case, application of a digital twin for manufacturing in the chiplet - packaging module. Participants will discuss the potential for digital twin technologies to drive progress in the semiconductor and microelectronics industry, and the role of data interoperability standards for digital twins in the semiconductor manufacturing ecosystem. Factors to be considered in identifying standards priorities include potential for broad impact, feasibility for accelerated development, and suitability for various standards development channels, including through alliances, incubators and accelerators, and standards setting organizations.

The workshop will feature plenary, panel, and interactive breakout sessions. Participants are expected to collaborate and discuss key questions and topics that will shape future data interoperability technical standards activities. The questions that will be considered include, but are not limited to:

• What are the advantages of digital twins in the semiconductor manufacturing ecosystem?
• What data are relevant to digital twins in semiconductor manufacturing? 
• Among those data what are the key interoperability needs? 
• What standards currently exist to meet those needs? 
• What standards are missing to enable the required interoperability?

Key findings will be published in a post-workshop report and will inform standards planning efforts across the semiconductor innovation ecosystem and within the CHIPS R&D Office.

Click on the green “Register” tab on right side of this page to register for the workshop. The draft agenda is located on the “Agenda” tab, which will be updated as the event nears.

We encourage interested stakeholders, industry representatives, and standards setting organizations to actively participate in this pivotal event. We welcome both domestic and international participation, as fostering global collaboration and enriching the discussions on advancing semiconductor standards and innovation are paramount to success. 

Join us at the CHIPS R&D Digital Twin Data Interoperability Standards Workshop as we collaboratively shape the future of semiconductor and microelectronics standards, foster innovation, and advance the industry together. 

Note that a related workshop focused on semiconductor supply chain trust and assurance data standards will be held April 2-3, 2024, at the same venue. Information regarding this related workshop (separate registration required) can be found on the event website for those who may want to attend both events.