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Publication Citation: Circuit-Aware Device Reliability Criteria Methodology

NIST Authors in Bold

Author(s): Jason T. Ryan; Lan Wei; Jason P. Campbell; Richard G. Southwick; Kin P. Cheung; Anthony Oates; John S. Suehle; Phillip Wong;
Title: Circuit-Aware Device Reliability Criteria Methodology
Published: September 12, 2011
Abstract: Meeting reliability requirements is an increasingly more difficult challenge with each generation of CMOS technology. The disconnection between conventional one-size-fits-all reliability specifications and the wide range of circuit applications might be a huge waste of resources. By taking into consideration circuit-level figures of merit, a novel methodology to establish device reliability criteria that reflects real-world operation of devices in circuits is proposed and demonstrated. This ―circuit-aware‖ methodology makes a real step toward realizing the goal of application-aware reliability standards which do not require additional measurements. The beauty is its simplicity ‹ a simple transformation to solve an important problem. The simplicity makes it attractive as a standard methodology.
Conference: European Solid State Device Research Conference
Proceedings: Proceedings of the European Solid State Device Research Conference
Pages: pp. 255 - 258
Location: Helsinki, -1
Dates: September 12-16, 2011
Keywords: Reliability, Circuit Aware, Hot Carrier, Lifetime
Research Areas: Analysis Tools and Techniques, Characterization