Electrical Test Structures Replicated in Silicon-On-Insulator Material

Published

May 1, 1996

Author(s)

Michael W. Cresswell, J Sniegowski, Rathindra Ghoshtagore, Robert Allen, L Linholm, John S. Villarrubia

Abstract

Measurements of the linewidths of submicrometer features made by different metrology techniques have frequently been characterized by differences of up to 90 nm. The purpose of the work reported here is to address the special difficulties that this phenomenon presents to the certification of reference materials for calibration of linewidth-measurement instruments. Accordingly, a new test structure has been designed and fabricated, and has undergone preliminary tests. Its distinguishing characteristics are assured cross-sectional profile geometries with known side-wall slopes, surface planarity, and compositional uniformity when it is formed in mono-crystalline material at selected orientations to the crystal lattice. To allow the extraction of electrical linewidth, the structure is replicated in a silicon film of uniform conductivity which is separated from the silicon substrate by a buried oxide layer. The utilization of a silicon-on-insulator (SOI) substrate further allows the selective removal of substrate material from local regions below the reference features, thus facilitating measurements by optical and electron-beam transmission microscopy. The combination of planar feature surfaces having known side-wall slopes is anticipated to eliminate factors which are believed to be responsible for methods divergence in linewidth measurements, a capability which is a prerequisite for reliable certification of the linewidths of features on reference materials.

Proceedings Title

Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography X, Susan K. Jones, Editor

Volume

2725

Conference Dates

March 11, 1996

Conference Location

Santa Clara, CA, USA

Conference Title

Optical And Electrical Linewidth Measurements

Pub Type

Conferences

Keywords

calibration, linewidth, MEMS, metrology, microlithography, SOI, standards

Citation

Cresswell, M. , Sniegowski, J. , Ghoshtagore, R. , Allen, R. , Linholm, L. and Villarrubia, J. (1996), Electrical Test Structures Replicated in Silicon-On-Insulator Material, Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography X, Susan K. Jones, Editor, Santa Clara, CA, USA (Accessed April 24, 2024)