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Publication Citation: 10 kV, 5A 4H-SiC Power DMOSFET

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Author(s): Sei-Hyung Ryu; Sumi Krishnaswami; Hull Brett; James Richmond; Anant Agarwal; Allen R. Hefner Jr;
Title: 10 kV, 5A 4H-SiC Power DMOSFET
Published: May 01, 2006
Abstract: In this paper, we report 4H-SiC power DMOSFETs capable of blocking 10 kV. The devices were scaled up to 5 A, which is a factor of 25 increase in device area compared to the previously reported value. The devices utilized 100 υm thick n-type epilayers with a doping concentration of 6 x 1014 cm-3 for the drift layer, and a floating guard ring based edge termination structure was used. The gate oxide layer was formed by thermal oxidation at 1175oC, followed by an NO anneal. A peak effective channel mobility of 13 cm2/Vs was extracted from a test MOSFET with a W/L of 150 υm / 150 υm, built adjacent to the power DMOSFETs. A 4H-SiC DMOSFET with an active area of 0.15 cm2 showed a specific on-resistance of 111 m{Ohm}-cm2 at room temperature with a gate bias of 15 V. The device shows a leakage current of 3.3 ??A, which corresponds to a leakage current density of 11 υA-cm-2 at a drain bias of 10 kV.
Citation: IEEE Transactions on Electron Devices
Pages: 4 pp.
Keywords: High-Voltage;power MOSFET;Silicon-Carbide
Research Areas: Electronics & Telecommunications
PDF version: PDF Document Click here to retrieve PDF version of paper (3MB)