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Publication Citation: Vertical Insulated Gate Bipolar Transistor Lumped Model and Saber Simulator Implementation

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Author(s): Allen R. Hefner Jr;
Title: Vertical Insulated Gate Bipolar Transistor Lumped Model and Saber Simulator Implementation
Published: May 01, 1994
Abstract:
Citation: Talk/Video for NTU Satellite Course
Research Areas: Electric Power Metrology