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Topic Area: Semiconductors
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Displaying records 1 to 10 of 152 records.
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1. Influence of Metal¿MoS2 Interface on MoS2 Transistor Performance: Comparison of Ag and Ti Contacts
Topic: Semiconductors
Published: 12/16/2014
Authors: Hui (Hui) Yuan, Guangjun Cheng, Lin You, Haitao Li, Hao Zhu, Wei (Wei NMN) Li, Joseph J Kopanski, Yaw S Obeng, Angela R Hight Walker, David J Gundlach, Curt A Richter, D. E Ioannou, Qiliang Li
Abstract: In this work, we present a study of enhancing MoS2 transistor performance by using proper metal contact. We found that the on-state current of MoS2 field-effect transistors with 30 nm Au/ 30 nm Ag contacts is enhanced more than 60 times and the subth ...

2. Non-destructive Measurement of the Residual Stresses in Copper Through-Silicon Vias using Synchrotron Based Micro-beam X-ray Diffraction
Topic: Semiconductors
Published: 7/1/2014
Authors: Chukwudi Azubuike Okoro, Lyle E Levine, Yaw S Obeng, Klaus Hummler, Ruqing Xu
Abstract: In this study, we report a new method for achieving depth resolved determination of the full stress tensor in buried Cu through-silicon vias (TSVs), using synchrotron based X-ray micro-diffraction technique. Two adjacent Cu TSVs were analyzed; on ...

3. Synchrotron-Based Measurement of the Impact of Thermal Cycling on the Evolution of Stresses in Cu Through-Silicon Via
Topic: Semiconductors
Published: 6/30/2014
Authors: Chukwudi Azubuike Okoro, Lyle E Levine, Ruqing Xu, Klaus Hummler, Yaw S Obeng
Abstract: One of the main causes of failure during the lifetime of microelectronics devices is their exposure to fluctuating temperatures. In this work, synchrotron-based X-ray micro-diffraction is used to study the evolution of stresses in copper through-sili ...

4. Metrology Needs for 2.5D/3D Interconnect
Topic: Semiconductors
Published: 6/20/2014
Authors: Victor Vartanian, Richard A Allen, Klaus Humler, Steve Olsen, Brian Sapp, Larry Smith
Abstract: This chapter will focus on the metrology steps to support 2.5D and 3D reference flows employing via-mid copper through-silicon via (TSV) processing, wafer thinning, and backside processing using a handle wafer and chip-to-chip bonding. Reference fl ...

5. Defect and Microstructural Evolution in Thermally Cycled Cu Through-Silicon Vias
Topic: Semiconductors
Published: 6/14/2014
Authors: Chukwudi Azubuike Okoro, James Marro, Yaw S Obeng, Kathleen Richardson
Abstract: In this study, the effect of thermal cycling on defect generation, microstructure, and the RF signal integrity of blind Cu through-silicon via (TSV) were investigated. Three different thermal cycling profiles were used; each differentiated by their ...

6. X-Ray Micro-Beam Diffraction Measurement of the Effect of Thermal Cycling on Stress in Cu TSV: A Comparative Study
Topic: Semiconductors
Published: 5/26/2014
Authors: Chukwudi Azubuike Okoro, Lyle E Levine, Yaw S Obeng, Klaus Hummler, Ruqing Xu
Abstract: Microelectronic devices are subjected to constantly varying temperature conditions during their operational lifetime, which can lead to their failure. In this study, we examined the impact of thermal cycling on the evolution of stresses in Cu TSVs us ...

7. Constant Shape Factor Frequency Modulated Charge Pumping (FMCP)
Topic: Semiconductors
Published: 3/3/2014
Authors: Jason T Ryan, Jason P Campbell, Jibin Zou, Kin P Cheung, Richard Southwick, Anthony Oates, Rue Huang
Abstract: Abstract, We examine the seemingly frequency-dependent gate leakage current component of frequency-modulated charge pumping and show it to be a measurement artifact. If untreated, this results in erroneous defect density extractions. We present a co ...

8. Detection of 3D Interconnect Bonding Voids by IR Microscopy
Topic: Semiconductors
Published: 2/20/2014
Authors: Jonny H?glund, Zoltan Kiss, Gyorgy Nadudvari , Zsolt Kovacs, Szabolcs Velkei, Moore Chris, Victor Vartanian, Richard A Allen
Abstract: There are a number of factors driving 3D integration including reduced power consumption, RC delay, and form factor as well as increased bandwidth. However, before these advantages can be realized, various technical and cost hurdles must be overcom ...

9. Back-End-of-Line Test Structure Design and Simulation for Subsurface Metrology with Scanning Probe Microscopy
Topic: Semiconductors
Published: 12/13/2013
Authors: Lin You, Emily Hitz, Jungjoon Ahn, Yaw S Obeng, Joseph J Kopanski
Abstract: As demands in the semiconductor industry call for further miniaturization and performance enhancement of electronic systems, the traditional planar (2D) electronic interconnection and packaging technologies show their difficulties in meeting the ...

10. Analysis of Implanted Silicon Dopant Profiles
Topic: Semiconductors
Published: 9/1/2013
Authors: B. P. Geiser, Eric B Steel, Karen T Henry, D. Olson, T.J. Prosa
Abstract: Atom probe tomography implant dose measurements are reported for National Institute of Standards and Technology Standard Reference Material 2134 (As implant). Efforts were taken to manufacture specimens with limited variation in size and shape to mi ...

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