NIST Engineers Discover Fundamental Flaw in Transistor Noise Theory
For Immediate Release: May 20, 2009
Contact: Chad Boutin
Chip manufacturers beware: There’s a newfound flaw in our understanding of transistor noise, a phenomenon affecting the electronic on-off switch that makes computer circuits possible. According to the engineers at the National Institute of Standards and Technology (NIST) who discovered the problem, it will soon stand in the way of creating more efficient, lower-powered devices like cell phones and pacemakers unless we solve it.
While exploring transistor behavior, the team found evidence that a widely accepted model explaining errors caused by electronic “noise” in the switches does not fit the facts. A transistor must be made from highly purified materials to function; defects in these materials, like rocks in a stream, can divert the flow of electricity and cause the device to malfunction. This, in turn, makes it appear to fluctuate erratically between “on” and “off” states. For decades, the engineering community has largely accepted a theoretical model that identifies these defects and helps guide designers’ efforts to mitigate them.
Those days are ending, says NIST’s Jason Campbell, who has studied the fluctuations between on-off states in progressively smaller transistors. The theory, known as the elastic tunneling model, predicts that as transistors shrink, the fluctuations should correspondingly increase in frequency.
However, Campbell’s group at NIST has shown that even in nanometer-sized transistors, the fluctuation frequency remains the same. “This implies that the theory explaining the effect must be wrong,” Campbell said. “The model was a good working theory when transistors were large, but our observations clearly indicate that it’s incorrect at the smaller nanoscale regimes where industry is headed.”
The findings have particular implications for the low-power transistors currently in demand in the latest high-tech consumer technology, such as laptop computers. Low-power transistors are coveted because using them on chips would allow devices to run longer on less power—think cell phones that can run for a week on a single charge or pacemakers that operate for a decade without changing the battery. But Campbell says that the fluctuations his group observed grow even more pronounced as the power decreased. “This is a real bottleneck in our development of transistors for low-power applications,” he says. “We have to understand the problem before we can fix it—and troublingly, we don’t know what’s actually happening.”
Campbell, who credits NIST colleague K.P. Cheung for first noticing the possibility of trouble with the theory, presented* some of the group’s findings at an industry conference on May 19, 2009, in Austin, Texas. Researchers from the University of Maryland College Park and Rutgers University also contributed to the study.
* J.P. Campbell, L.C. Yu, K.P. Cheung, J. Qin, J.S. Suehle, A. Oates, K. Sheng. Large Random Telegraph Noise in Sub-Threshold Operation of Nano-scale nMOSFETs. 2009 IEEE International Conference on Integrated Circuit Design and Technology. Austin, Texas. May 19, 2009; and Random Telegraph Noise in Highly Scaled nMOSFETs. 2009 IEEE International Reliability Physics Symposium, Montreal, Canada, April 29, 2009.