March 30, 2020
Author(s)
Madhulika S. Korde, Regis J. Kline, Daniel Sunday, Nick Keller, Subhadeep Kal, Cheryl Alix, Aelen Mosden, Alain C. Diebold
The three-dimensional architectures for field effect transistors (FETs) with vertical stacking of Gate-all-Around Nanowires provide a pathway to increased device density and superior electrical performance. However, the transition from research into