We demonstrate a method to characterize and represent bias-tees, and other components in the signal path, in an accurate and practical fashion in circuit simulations. The method involves measuring S-parameters of the bias-tee, other surrounding circuitry, and the test equipment, and incorporating them into the simulation through a table representation. The method does not rely on any circuit approximations and, because it is based on models of linear elements, it can also be used in the strongly nonlinear regime. Using this method we are able to predict the third-order intermodulation distortion products, IM3, to within 0.75 dB in the weakly nonlinear regime in four different measurements. Further, we explore the limits of IM3 from baseband effects and show that the bias network may cause IM3 to be predicted up to 13 dB too high or too low in a simulation. From the perspective of modeling the device under test, the method leaves only the device model itself in question if simulation and measurement results differ, thus making nonlinear circuit characterization and modeling more accurate.
Citation: IEEE Transactions on Microwave Theory and Techniques
Pub Type: Journals
Bias-tee, circuit simulation, intermodulation distortion, memory effect, nonlinear device, nonlinear measurement, vector network analyzer