Simulated results for techniques used to validate the on-state, resistive load switching, inductive load switching, and high voltage depletion capacitance performance for 4H-SiC power MOSFETs are presented. The validation is performed using a script written in AIM language incorporated in the Saber? circuit simulator. Data from the IMPACT tools and from laboratory measurements is compared against the circuit simulator models output. Measured versus simulated results are presented for different samples of 10-kV SiC power MOSFET device designs produced by Cree Inc. during Phase 2 of the DARPA Wide Band-gap Semiconductor Technology High Power Electronics (WBST-HPE) program.
Proceedings Title: Proc., Power Electronics Specialist Conference
Conference Dates: June 17-21, 2007
Conference Location: Orlando, FL
Conference Title: Power Electronics Specialist Conference
Pub Type: Conferences
4H-SiC power MOSFETs, models, silicon cabide, Simulated, validation