Metal gates have been intensively searched to replace the poly-silicon for the next generation metal-oxide-semiconductor field-effect transistor. The barrier height (??0) at their interfaces with a gate dielectric must be known to select a suitable metal. In this letter, internal photoemission was used to determine ??0 of two important ternary metals: [TaN/TaSiN] and [TaN/TaCN] on a single SiO2 layer and a [HfO2/SiO2] stack. On SiO2, ??0 was found to be 3.36 eV and 3.55 eV at [TaN/TaSiN] stack] / SiO2 and [TaN/TaCN stack] / SiO2 interfaces, respectively. However, on the [HfO2/SiO2] stack, ??0 was found pinning at 2.5 eV. For comparisons, flat band voltage measurements will also be presented.
Citation: Applied Physics Letters
Pub Type: Journals
C-V, Gate Dielectrics, HfO2, Interface Barrier Height, Internal Photoemission, Metat Gates, SiO2, TaCN, TaSiN