Our world is three-dimensional, so are the integrated circuits (ICs), they have always been. In the past, for a long time, weve been very fortunate, because it was enough to measure the critical dimension (CD), the width of the resist line to keep IC production under acceptable control. This requirement has changed in a few years to contour and now to three-dimensional measurements. Optical lithography is printing photo resist features that are significantly smaller than the wavelength of the light used, and therefore it is indispensable to use optical proximity correction (OPC) methods. This includes modeling and compensation for various errors in the lithography process down to sub-nanometer, essentially atomic levels. The process has to rely on sophisticated and complex simulations and on accurate and highly repeatable dimensional metrology. The necessary dimensional metrology is beyond the traditional one-dimensional line width measurements, and must include two- and three-dimensional measurements of the contours and shapes of structures. Contour metrology needs accurate and highly repeatable measurements on sets and individual OPC structures, for which the critical dimension measurement scanning electron microscope (SEM) is the key metrology tool. Three-dimensional (3D) metrology is now indispensable for IC technology, but current metrology tools and methods cannot fulfill the requirements. We believe that with the implementation of new methods it is feasible to develop 3D metrology that will serve well IC production even on a few nanometer-size structures.
Citation: Proceedings of SPIE
Pub Type: Journals
three dimensional, 3D, contour metrology, critical dimension, atomic force, scanning electron microscope, AFM, SEM