https://csrc.nist.gov/CSRC/media/Events/second-pqc-standardization-conference/documents/accepted-papers/seo-sike-paper.pdf
SIKE Round 2 Speed Record on
Embedded Processors
Hwajeong Seo1, Amir Jalali2, and Reza Azarderakhsh2
IT Department, Hansung University, Seoul, South Korea, hwajeong84@gmail.com
Department of Computer and Electrical Engineering and Computer Science,
Florida Atlantic University, FL, USA,
{ajalali2016,razarderakhsh}@fau.edu
Abstract. We present the optimized software implementation of Super-
singular Isogeny Key Encapsulation (SIKE) round 2, on low-end 32-bit
ARM Cortex-M4 microcontrollers and high-end 64-bit ARM Cortex-A53
processors. The proposed library introduces a new speed record of SIKE
protocol on the target embedded processors. We achieved this record by
adopting several state-of-the-art engineering techniques as well as ...