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Next: 3.10 The mux4_1 module Up: 3 The VHDL program Previous: 3.8 The arp module   Contents

3.9 The response status module

This module is activated to reply to any request made to the microphone array and received and understood by the module read message.

Figure: The response status module
schema of the response status module

First, the clk_response_status is the main clock through this module. The signal reset is used at startup to initialize the signals inside the module. The signal buzzy tells to other modules that it's making a frame while it is high. The signal start_arp activates the module.

The module builds the different UDP protocol fields from the inputs destination_mac (MAC address of the destination provided by the read message module), source_mac (MAC address of the microphone array), destination_ip (IP address of the destination provided by the read message module), source_ip (IP address of the the microphone array), type_request(2:0) (number given to identify the response) and data_request(9:0) (data of the response).

Here is the different types of response implemented:

  • request 02: status of slave/master mode,
  • request 03: ID of the microphone array,
  • request 05: status of the capture.
  • request 08: status of the sampling frequency multiplier.

Snd finally the module sends the complete message to the mux4_1 module with req_response_status_frame, select_response_status_frame, data_response_status_out(7:0) and en_data_response_status_out. for more information, see the mux4_1 module.


next up previous contents
Next: 3.10 The mux4_1 module Up: 3 The VHDL program Previous: 3.8 The arp module   Contents
Cedrick Rochet 2005-09-21

Created on 2008-06-18 by Antoine Fillinger - Last updated on 2008-11-23 by Antoine Fillinger