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Contents

• 1 Historic.
  • 1.1 The First Generation
  • 1.2 The Second Generation
  • 1.3 The Third Generation version 1
  • 1.4 The Third Generation version 2
• 2 The hardware.
  • 2.1 Microboard
  • 2.2 Motherboard
• 3 The VHDL Program for the FPGA
  • 3.1 The VHDL
  • 3.2 UPD
  • 3.3 The Main VHDL Program
  • 3.4 The Capture module
  • 3.5 The SRAM Interface module
  • 3.6 The capture_udp_frame module
  • 3.7 The BOOTP module
  • 3.8 The arp module
  • 3.9 The response status module
  • 3.10 The mux4_1 module
  • 3.11 The CRC32 module
  • 3.12 The tx_frame module
  • 3.13 The incoming message module
  • 3.14 The read incoming message module
  • 3.15 The MI interface for configuration and status
• 4 The softwares on the computer.
  • 4.1 The command and control
  • 4.2 The oscilloscope
  • 4.3 The library
• 5 The box.
  • 5.1 Material needed
  • 5.2 Dimensions

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Cedrick Rochet 2005-09-21