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The National Semiconductor Metrology Program at the Commerce Department's National Institute of Standards and Technology is a key enabler for the semiconductor development and manufacturing goals described in the Semiconductor Industry Association's National Technology Roadmap for Semiconductors. NSMP programs provide the semiconductor industry with the high-resolution, precise and increasingly sensitive measurement tools needed to create the tinier, more powerful computer chips of the future. NSMP's goal is to help the U.S. semiconductor industry keep its multibillion dollar competitive edge into the 21st century.
Examples of NSMP-supported work at NIST include:
NIST recently filed a patent for an X-ray microcalorimeter that fits easily onto existing scanning electron microscopes and can provide chemical composition information with at least 10 times better energy resolution than the most widely used commercially available instruments.
The NIST instrument determines the chemical composition of a sample based on the energy of X-rays given off as the sample is scanned with a beam of electrons. Its improved resolution stems from the use of a superconducting detector that undergoes a rapid change in electrical resistance when heated by the absorption of a single X-ray. The instrument uses a NIST-developed mini-refrigerator that cools the detector chip to an operating temperature near absolute zero. Such cold temperatures are necessary to achieve high resolution.
Commercially available X-ray spectrometers used in industry provide either ease of use by detecting a broad range of X-ray energies or high-energy resolution (2 to 20 electron volts). The NIST instrument achieves both.
Although the instrument will be useful to a wide range of industries, semiconductor manufacturers have been following the NIST project closely and will be prime customers for the new technology. Better resolution of X-ray energies should translate into improved chemical analysis of contaminant particles during semiconductor processing, an increasingly important quality control factor as circuit dimensions continue to shrink. The NIST system fully discriminates overlapping X-ray emission spectra of silicon and tungsten important for identifying tungsten silicide, a common material in integrated circuits. It also improves identification of "light" elements such as carbon, nitrogen and oxygen.
NIST currently is looking for industrial partners to share in the commercial development of the new instrument.
Technical Contact: John Martinis, (303) 497-3597, martinis@boulder.nist.gov
The ability to accurately define optical scattering--how light is spread after hitting a surface--by a silicon wafer provides invaluable data for the successful manufacture of semiconductor chips. Unfortunately, optical scatter instruments lack standardization, making it difficult to compare values obtained by devices from different companies. A new NIST software package soon will offer chip makers a way to reconcile and compare data derived from different systems.
The software uses an algorithm that compensates for the unique characteristics of individual optical scatter instruments and yields readings free of any variance. The purified data can be obtained for silicon wafers exhibiting microroughness.
The American Society for Testing and Materials is currently incorporating this method into documents describing wafer inspection systems. The software is expected to become available by the end of August 1997.
Technical Contact: Thomas A. Germer, (301) 975-2876, thomas.germer@nist.gov
NIST, the Energy Department's Sandia National Laboratories and the private sector's SEMATECH have developed a new measurement artifact to support the future manufacture of faster, more powerful microchips than can be built currently.
The proposed reference material is now being evaluated by NIST and by a private-sector consortium of 13 semiconductor manufacturers and metrology tool companies. The goal of the linewidth artifact is to help U.S. chip makers calibrate their own microchip-measuring equipment for assessments of features as tiny as 1/1,000th the width of a human hair.
Made of a single-crystal silicon film, the proposed reference material's geometric regularity offers flat, smooth surfaces ideal for comparative measurement of the incredibly tiny critical dimensions (known as CDs) of transistors that make up microchip integrated circuits.
Current metrology reference materials, created by photo patterning and plasma etching polycrystalline films, are not as uniform. Distortion or variability in measurements becomes severe when the feature being measured falls beneath 0.35 micrometer (about 1/300th the width of a human hair). The proposed reference material facilitates intercomparisons between methods by reducing the complicating factor of geometrical variability and has the goal of providing a traceable reference point for comparing different methods. It is not intended to address problems arising while measuring features encountered in typical production wafers whose materials and geometries are different from those of this artifact.
A Single-Crystal CD-Reference Materials Consortium was established in response to numerous requests to evaluate a prototype of the reference material. Sample test chips have been distributed to the 13 corporate consortium members. Under the terms of a cooperative research and development agreement, each member will make a minimum of 20 measurements on segments of the chips. Comparative measurements will be made concurrently with conventional metrology methods: low-cost electrical techniques, optical transmission microscopy, scanning electron microscopy and atomic force microscopy.
Consortium members also promise to assess the commercial utility of the prototype reference samples and to suggest design and fabrication enhancements that eventually could lead to the development of a traceable-to-NIST Standard Reference Material.
Testing results will be reviewed by the consortium at a meeting during the July 14-18, 1997, SEMICON West 97 trade show and conference in San Francisco, Calif.
Technical Contact: Loren W. Linholm, (301) 975-2052, loren.linholm@nist.gov
The strain of daily cycles can be very fatiguing--for metals as well as for people. When those metals are critical components connecting integrated circuits within multichip devices, fatigue can cause costly failures.
NIST researchers are working with several U.S. companies to develop ways to detect and model strain in chip to chip connections. One promising method is electron beam moire, a technique that allows quantitative analysis of strain within connections on a microscopic scale. The moire technique exploits the same principle that causes plaid suit coats to vibrate into wavy rainbow patterns on television--the fact that interference is generated when an image scanner matches up with lines on the subject being imaged.
In a recent study, a high-density interconnect structure for a multichip module was examined. A cross section was prepared with a grating of closely spaced parallel lines and viewed in the scanning electron microscope. The normal image of the copper and polymer layers was visible with a moire fringe pattern superposed on top, like broad translucent bands or stripes. When the specimen was heated, the different materials in the structure actually expanded by different amounts. The appearance of the structural features was unchanged because the expansions were much less than 1 percent. However, the number and shape of the moire fringes changed visibly because the moire effect amplified small changes in shape. For example, in this experiment, if the whole structure had expanded by 1 percent, five additional fringes would have appeared. Potential weak points in the structure were revealed as the areas where the moire fringe pattern changed the most with heating.
NIST researchers are using the moire method to verify computer models that predict strain to help manufacturers ensure the reliability of interconnections without the necessity of testing new circuit designs to failure.
Technical Contact: David Read, (303) 497-3853, read@boulder.nist.gov
Optical scattering is used by the semiconductor industry to measure the microroughness of a silicon wafer as well as detect particulate contaminants and subsurface defects. However, the ability of optical scattering instruments to do the job is limited by problems with sensitivity. Light scattering due to microroughness can obscure or overwhelm the scattering caused by particles.
NIST researchers have discovered a way to cleanly distinguish the scattering shown by microroughness from that of particulate contamination or subsurface defects. Using a novel technique called bidirectional ellipsometry, they have found that light scattered by microroughness has a characteristic, well-defined, polarization "signature." They also learned that other scattering sources, such as particulate contaminants and subsurface defects, scatter light with unique polarizations different than those exhibited by microroughness.
With this knowledge, the researchers designed an instrument that is blind to the microroughness optical scattering pattern. Therefore, nanoscale particles on silicon wafers can be detected and measured without the former problem of interference. A provisional patent has been filed on the device.
What this means to the semiconductor industry is that particles with diameters less than 0.1 micrometer soon may be routinely discernible. The Semiconductor Industry Association roadmap declared that, in the future, such ability would be a breakthrough advance toward the manufacture of tinier integrated circuits.
In addition to its usefulness in process inspection of silicon wafers, bidirectional ellipsometry is expected to become a powerful technique for identifying and characterizing defects in optical components, disk storage materials and film coatings.
Technical Contact: Thomas A. Germer, (301) 975-2876, thomas.germer@nist.gov
NIST and VLSI Standards Inc. are working together to develop improved thin dielectric film standards that the microelectronics industry can use for calibration of optical instruments needed to develop and control thin-film growth processes. Traceable film thickness standard artifacts are critically needed to support the instrumentation needs identified in the National Technology Roadmap for Semiconductors. The industry requires traceability to NIST for film thickness measurements, which are difficult to make and interpret correctly. Errors in these measurements greatly affect the electrical properties of integrated circuits and thus the yield of salable chips.
Under a cooperative research and development agreement, the NIST/VLSI Standards collaboration aims at developing a procedure for NIST to team with private industry to help produce NIST-traceable reference materials. The two organizations agreed under the CRADA to develop a test sample set including key thicknesses from earlier thin-film SRMs to provide a link with previous experience, but which also includes 7.5 nanometer and 4.5 nanometer films. They also collaborated to determine a viable and effective measurement protocol that provides a means for establishing NIST traceability of thin-film standards at these and future technology nodes.
The results of the collaboration between NIST and VLSI Standards will be available in August as NIST Special Publication 400-100.
Technical Contact: Barbara Belzer, (301) 975-2248, barbara.belzer@nist.gov
Four companies and SEMATECH have joined NIST in a new consortium to develop the measurement instruments needed to pack more features into tomorrow's semiconductor chips. Corporate members include Bio-Rad Laboratories, Digital Instruments, KLA Instruments and Optical Specialties Inc. The Scanning Capacitance and Electromagnetic Sensor Consortium plans to research new ways to measure accurately the relative location or overlay of features placed on successive chip layers. Members will compare the merits of two new overlay measurement methods-- scanning capacitance probes and electromagnetic sensors.
Enhancement in semiconductor wafer metrology will strengthen the U.S. leadership in the production of overlay-metrology tools and indirectly help maintain the nation's number one position in the multibillion dollar global semiconductor industry. The consortium provides domestic companies access to essential technology resources and to results significantly earlier than publication or other conventional means of dissemination would make them available worldwide, including to foreign competitors.
Technical Contact: Loren W. Linholm, (301) 975-2052, loren.linholm@nist.gov
A new scanning electron microscope stage, jointly developed by NIST, E. Fjeld Co., of North Billerica, Mass., and SEMATECH, will permit users of a widely used laboratory SEM to cover nearly all angles when examining their samples. The new stage doubles the viewing range of the typical SEM stage and increases the tilt to better than 90 degrees from the horizontal, as compared to the current 60 degrees. Such improved performance capabilities are expected to increase the utility of SEMs as measurement and research tools. NIST has been working with SEMATECH, the consortium of U.S. chip makers and their equipment suppliers, to improve the measurement performance of SEMs and other microscopes used in semiconductor manufacturing.
Technical Contact: Michael Postek, (301) 975-2299, michael.postek@nist.gov
Measurement of the index of refraction--the property that determines how a lens of a particular material focuses light--is critical to efforts to develop photolithographic exposure tools for the manufacture of future-generation integrated circuits. NIST scientists have made measurements of the index of refraction of fused silica and calcium fluoride at wavelengths near 193 nanometers.
NIST, in collaboration with MIT Lincoln Laboratory and SEMATECH, seeks to develop the infrastructure required to utilize 193 nanometer laser emission for 0.18 micrometer integrated circuit feature sizes (for products such as gigabyte memory chips). These index-of-refraction results keep industry on track to meet the National Technology Roadmap for Semiconductors' target date of 2001 for commercial production of these chips.
The NIST researchers have made temperature- and wavelength-dependent index-of-refraction measurements on optical materials that are required for such photolithography. Engineers require such precise data to design accurately components for the photolithographic tools. To make the index of refraction measurement accurate to 10 parts in a million, the researchers upgraded a precision refractometer, which is capable of temperature control of 0.1 degrees Celsius. For the longer term and for shorter wavelengths, they are developing interferometric methods capable of higher accuracy.
Technical Contact: Rajeev Gupta, (301) 975-2325, rajeev.gupta@nist.gov
The resistivity of silicon wafers is a vital concern to the multibillion dollar semiconductor industry. This summer, NIST will release five new Standard Reference Materials that will enable manufacturers to calibrate resistivity test instruments to 0.3 percent, or better, with 95 percent confidence. This advance, an improvement over previous resistivity SRMs, cuts resistivity measurement uncertainty by approximately a factor of five. The upgraded measurement capacity significantly surpasses the accuracy and precision requirements set forth at the 1991 "SEMATECH Workshop on Silicon Materials for Mega-IC Applications."
The new standards will have better uniformity of resistivity and thickness, larger characterized area and smaller certification uncertainty than previous resistivity standards. The soon-to-be-distributed SRMs are 100 millimeters in diameter and are intended for the calibration or performance verification of four-point probes and eddy current testers. Unlike the current resistivity SRMs that are certified for value only at the wafer center, the new SRMs provide certified measurements at the center and on circles of 10 millimeter and 20 millimeter diameters for better compatibility with automated resistivity uniformity mapping instruments.
The following standards are to be released this summer: SRM 2541 at 0.01 ohm centimeters, SRM 2542 at 0.1 ohm centimeters, SRM 2445 at 25 ohm centimeters, SRM 2546 at 100 ohm centimeters, and SRM 2547 at 200 ohm centimeters. Technical Contact: James Ehrstein, (301) 975-2060.
For more information on NIST's semiconductor work, see the Semiconductor Electronics Division web site.
7/14/97