Sample behavioral waveforms for design file altpll1.v

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design altpll1.v. The design altpll1.v has Cyclone II FAST pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 10000 ps. CLK0 multiply by = 1, CLK0 divide by = 1, CLK0 phase_shift = 0

Fig. 1 : Wave showing NORMAL mode operation.