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Joseph J. Kopanski

Mr. Kopanski is the leader of the CMOS and Novel Devices Group in the Engineering Physics Division of the Physical Measurement Laboratory (PML) at the National Institute of Standards and Technology (NIST). He was born in Cleveland, Ohio in 1960. He received the B.S. degree in Applied Physics and the M.S. degree in Electrical Engineering and Applied Physics from Case Western Reserve University in 1982 and 1985, respectively. He joined the then National Bureau of Standards (now the National Institute of Standards and Technology), Semiconductor Electronics Division as an Electrical Engineer in 1985. At the NIST, his recent research has been directed towards developing quantitative metrology techniques based on scanning probe microscopes for semiconductor and dielectric characterization, including Scanning Capacitance Microscopy and Scanning Kelvin Probe Microscopy. In 2005, he served a term in the NIST Director's Program Office as a Program Analyst.

Joseph J. Kopanski


Electrical Engineer
Engineering Physics Division
CMOS and Novel Devices Group

Phone: 301-975-2089
Email: joseph.kopanski@nist.gov