Bookmark and Share Combinatorial Measurement Methods for Advanced CMOS Devices

Summary:

Our goal is to develop novel, combinatorially compatible measurement methods and comprehensive and consistent data sets that will enable the microelectronics industry to select new materials more rapidly and intelligently. Currently, the silicon microelectronics industry is materials-limited; the traditional transistor and capacitor formation materials — silicon, silicon dioxide, and polysilicon  — have been pushed to fundamental material limits, and continued scaling will require the introduction of novel materials.

Description:

bottom right pic CMOS devicesThe traditional gate stack layers  (SiO2gate dielectric and polycrystalline Si gate electrode) in current Si microelectronic devices must be replaced with a high dielectric constant  (high-k) gate dielectric and a metal gate electrode. We will develop combinatorial methodologies to: (1) fabricate compositionally graded thin film libraries of novel gate metal electrode-high-k gate dielectric-substrate combinations ("gate stack" structures) ; and (2) measure the key electronic properties (e.g., work function) and thermal stability of such libraries. A nanocalorimetry method will be developed to  measure  thermal  stability;  this  work  is  covered  in  another  project description. Comprehensive data sets of electronic properties as a function of composition will be generated for materials systems identified as high priority by the microelectronics industry. First-principles modeling techniques will be used to predict the electronic properties of such systems.

Impact and Customers:

  • mgreen_cmosThe silicon (Si) microelectronics industry and the consumer electronics and information revolution that it fuels is, at $750 billion, one of the largest sectors of the U.S. (and global) economy. The development of materials with superior properties that will enable device scaling (dimensional shrinkage of integrated circuit device elements according  to Moore's Law) and enhanced device performance is key to continued innovation in Si microelectronics.
  • Currently, there are no rapid measurement techniques to determine the physical and electrical properties of novel metal-oxide-semiconductor (MOS) materials; the availability of such methods would enable rapid selection and optimization of these materials and their commercialization in devices.
  • Key customers include Sematech and major U.S. semiconductor manufacturers such as Intel, Micron, and Qualcomm. We are very active in promoting the use of combinatorial methodologies with these customers.

Major Accomplishments:

We commissioned a state-of-the-art combinatorial tool capable of producing thin film libraries by reactive sputtering or pulsed laser deposition (PLD). Both chambers are equipped with multiple targets, allowing for the deposition of ternary films of metals and nitrides (by sputtering) and oxides (by PLD) with sub-monolayer (0.5 nm) thickness control.

side 2 1st column Combinatorial thin film tool
Combinatorial thin film tool

The microelectronics industry has identified HfO2, Hf-Si-O, and Hf-Si-N, among other high-κ gate dielectrics, as the leading candidate replacement materials for SiO2; however, the replace polysilcon is less advanced. Thus, we have focused our effectors on gate electrode materials, specifically metals (Ni-Ti-Pt ternary sytem) and metalloids (Ta1-xAlxNy system).

In conjunction with the NIST Electronics and Electrical Engineering Laboratory,we have developed high throughput,automated methods to measure current-voltage (I-V) and capacitance-voltage (C-V) properties of gate stack structures.

From these measurements, the work function (jm) and leakage current density (JL) can be determined. Shadow masks are used during thin film deposition, so etching is not needed to produce capacitor pillars. Each capacitor is individually addressable; the properties of 700 capacitors can be measured in 5 hours.

Work function values for a combinatorial Ni-Ti-Pt film library deposited by sputtering onto a HfO2 dielectric film were determined for capacitors spanning nearly the full composition range of the ternary gate metal system.

side 2 2nd column values for a Ni-Ti-Pt library
φm values for a Ni-Ti-Pt library measured using scanning Kelvin probe microscopy

We also investigated the Ta1-xAlxNy system, a metalloid that is stable up to 950 °C and thus is suitable for current "planar" integrated process manufacturing. A library with x varying between 0.05 and 0.85 was deposited onto a HfO2 dielectric film by reactive sputtering, followed by a forming gas anneal (FGA) at 500 °C. After measuring the C-V and I-V curves, the library was subjected to 900 °C and1000 °C rapid thermal anneals (RTAs). Work function values before and after the RTAs were compared. Our results on the Ta1-xAlxNy and Ni-Ti-Pt systems are the first reported comprehensive measurements of the dependence of work function on composition for ternary gate electrodes on high-k dielectrics.

pp_green3
Variation in φm with composition (x) for the metal gate electrode Ta1-xAlxNy
CMOS_image

Start Date:

October 24, 2008

End Date:

ongoing

Lead Organizational Unit:

MSEL
Contact

 Martin Green
(Ceramics Division)
(301) 975-8496
martin.green@nist.gov