Nanomanufacturing Metrology Program

By 2015, products incorporating nanoscale materials and devices are predicted to account for 15 percent of global manufacturing out. Spanning industries from aerospace and automotive to chemicals and computers, U.S. manufacturers will be challenged to master new production and assembly processes that achieve ultra-fine levels of dimensional control, down to a few nanometers. Such capabilities still are works in progress.  Focusing on electronics manufacturing, this NIST program is developing essential parts of the measurement infrastructure needed to ensure U.S. leadership in nanomanufacturing.   Key outputs will include physical standards traceable to the International System of Units (SI) and physics-based models and calibration techniques that enable accurate determination of dimensional information.

The semiconductor industry’s decades-long run of reducing the size and doubling the number of devices on a silicon chip about every two years is nearing an end.   Within a decade or so, integrated circuit manufacturers and allied industries—especially data storage and photonics—will be transitioning to novel nanoscale alternatives to the shrinking transistor and other silicon-based technologies that have enabled the biennial leaps in computing power. 
As these important industries converge on the ultimate dimensional limits of conventional technologies, their measurement needs become ever-more demanding and complex.  The Nanomanufacturing Metrology (NanoMet) Program collaborates closely with organizations in all three industries to develop the benchmark, high-accuracy measurement references and methods that are intrinsic reliable, advance manufacturing methods.  NanoMet staff members are working with a variety of companies—from chip makers to materials and equipment suppliers--as well as government agencies and universities that tackling problems associated with designing, making, assembling, and integrating at the sub-micrometer level deep into the nanoscale.  Program researchers focus on providing solutions—in the form of research results, services, and reference materials—that enable increasingly accurate measurement standards, calibration techniques, and instrumentation, all traceable to SI definition of the meter.  Traceability—the chain, or uninterrupted lineage, that ultimately links dimensional measurements to the international length standard—is essential for ensuring measurement accuracy, comparability of results, reliable processes, and, most important, quality products.
The reference metrology infrastructure that the NanoMet Program is building will enable U.S. semiconductor producers, nanotechnology start-ups, and other high-precision manufacturing operations to extend the capabilities of today’s state-of-the-art processes  and successfully transition to the entirely new production methods that nanomanufacturing ultimately will require.

The NanoMet Program’s key objectives follow

Timely provision of measurement references and tools along the spectrum from 100 nanometers down to 1 nanometer, as required by U.S. industry to enhance productivity and innovation.  Reference materials, methods, and other tools will be traceable to the SI unit of length. In addition, such outputs will be compatible with measurement instrumentation employed by industry.

Development of new measurement techniques that enable  the semiconductor industry, in particular, to scale back measurement limits, or critical dimensions, as the width and length of circuit features decrease further and tolerances shrink accordingly.  Three major techniques are the focus of work to achieve this objective: atomic force microscopy, scanning electron microscopy, and optical microscopy.  In addition, efforts are directed toward at the level of wafers, from which hundreds of chip-sized circuits are made, and the photomasks that are used to produce the intricate circuit patterns during processing.

Develop capabilities to measure the placement and position of photomasks with subnanometer accuracy so as to achieve precise layer-to-layer alignment of features through all of the sequential patterning steps in the chip production process.  Accurately overlaying features from different manufacturing process levels is considered to be one of the most measurement-critical steps in semiconductor manufacturing.  Even slight mistakes diminish device performance. Capitalizing on recent advances that have increased the resolution achievable with optical microscopes, NIST is developing an entirely new measurement infrastructure for  accurate placement (registration) of multiple layers with sub-nanometer accuracy.

All of this work is being done collaboration with industry partners, including International SEMATECH, the consortium of semiconductor manufacturers.

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• Developed a critical-dimension atomic force microscope (CD-AFM) that underpins the reference measurement systems that have been established by NanoMet staff at both NIST and SEMATECH.
• Delivered Standard Reference Material 5001, a 150 millimeter by 150 millimeter grid plate reference artifact, with a reported measurement uncertainty of less than 30 nanometers and a coverage factor of two.
• Delivered NIST Standard Reference Mate¬rial 2059, a photomask linewidth standard.
• Improved MONSEL, software for Monte Carlo simulation and modeling using scanning electron microscope data, to a robust 3-dimensional geometry version, extending the number and types of sam¬ples and measurements that can benefit from the methods we have developed to increase the accuracy and utility SEM measurements.