Jungseok Chae

Jungseok Chae is a CNST/UMD Postdoctoral Researcher in the Electron Physics Group.  He received a B.S., an M.S., and a Ph.D. in Physics from Seoul National University, Seoul, Korea.  For his doctoral research, Chae worked in collaboration with the CNST’s Joseph Stroscio and Nikolai Zhitenev, applying scanning gate microscopy, a low temperature atomic force microscopy technique, to examine electron transport at the edge of graphene devices.  At NIST, Chae is working with Joseph Stroscio to measure the properties of graphene systems using low temperature scanning tunneling microscopy, and to develop methods to optimize low temperature atomic force microscopy.  

• Large-Scale Soft Colloidal Template Synthesis of 1.4 nm Thick CdSe Nanosheets, J. S. Son, X.-D. Wen, J. Joo, J. Chae, S. Baek, K. Park, J. H. Kim, Y. Kuk, R. Hoffmann, and T. Hyeon, Angewandte Chemie International Edition 48, 6861-6864 (2009).
• Versatile Low-Temperature Atomic Force Microscope with In-Situ Piezomotor Controls, Charge-Coupled Device Vision, and Tip-Gated Transport Measurement Capability, J. Lee, J. Chae, C. K. Kim, H. Kim, S. Oh, and Y. Kuk, Review of Scientific Instruments 76, 093701 (2005).